How Can Boundary Scan Help Things You Use?

Boundary Scan

BGA Packaging

High Density Boards

---

Boundary Scan

PROBLEM

JTAG or boundary scan was developed to address the "loss of physical access" problems that occur as a result of implementing new packaging technologies.

Since its standardization (IEEE 1149.1) boundary scan usage (also known as JTAG) has expanded and evolved into something more like a communications protocol running within an electronic system. In this way, it is similar to the Internet -- which allows you to access all kinds of information. Boundary scan allows you to access all kinds of design and test structures.

Those structures help you:

• Debug and test boards
• Program devices
• Diagnosis hardware problems

---

SOLUTION

ASSET JTAG boundary-scan tools help solve interconnect test problems, and enable CPLD/FPGA Programming and Flash Programming. Boundary scan delivers this functionality because it can be used to access the "internals" of a:

• Device -- to run Built-In Self-Test (BIST)
• Board -- to verify proper assembly
• System -- to help configure a system

So JTAG gives you the ability to test a:

• Device and access internal scan
• Board and program devices
• System and verify assembly of boards to daughter cards, multichip modules (MCMs) and to other boards on the backplane

If you would like to get started implementing boundary scan using PC-based tools, our customers find success combining the following four elements

To speak with an ASSET representative, click here.

---

BGA Packaging

PROBLEM

BGA's give designers the capability to put even more functionality into an even smaller area. However, when these designs flow through the rest of the product development process, three problems typically arise:

1. Loss of Physical Access - Using BGAs to carry signals means that there are no leads coming off the chip or through the board. This makes physical access to the device impossible.
2. Solder Smearing - Assembling boards with BGAs is much more difficult than previous packaging technologies because the solder is so easily smeared. This leads to structural, interconnect and functional problems.
3. Test Points - To use traditional testing methods, the designer is forced to bring out a large number of test points -- which is in direct conflict with the designer's goals to miniaturize the design.

---

SOLUTION

ASSET JTAG boundary-scan tools give back the access that BGAs would otherwise take away. Test and design engineers can now access and control the signals (inputs and outputs) of a BGA package. Our customers have found that using a combination of the following elements can solve BGA problems:

To speak with an ASSET representative, click here.

---

High Density Boards

PROBLEM

Today, printed circuit boards are getting smaller and smaller and are becoming more and more densely populated. When these designs flow through the life-cycle of the development process, three problems quickly become apparent:

1. Loss of Physical Access - One characteristic of high density boards is that they incorporate BGA packaging technology where there are no leads coming off the chip or through the board. This makes physical access to the device for testing very difficult.
2. Number of Nets - A large majority of high-density boards include in excess of 3,000 different nets. To use traditional testing methods, the designer must incorporate a large number of test points and in many cases, the number of test points exceeds the limitation of many In-circuit testers.
3. Fixturing - Long lead times to build complex fixtures means that boards can not be debugged until after the fixture is built. At approximately $10/nail for a fixture for a high-density board, fixtures can cost between $30-$100K. Both issues negatively impact the design project.

---

SOLUTION

ASSET JTAG boundary-scan tools give back the access that BGAs would otherwise take away and help reduce the number of physical testpoints (thus cost) that are required to test the printed circuit board. Less testpoints means fixtures can less complex, completed sooner, and less costly. Also, boundary scan enables test engineers to develop and debug tests before fixtures are built.In some cases, with high test coverage with ASSET's boundary-scan tools, there is no need for fixtures or ICT. Our customers have found that using a combination of the following elements can solve those problems associated with High Density Boards:

To speak with an ASSET representative, click here.