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BOUNDARY SCAN

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Boundary Scan

PROBLEM

JTAG or boundary scan was developed to address the "loss of physical access" problems that occur as a result of implementing new packaging technologies.

Since its standardization (IEEE 1149.1) boundary scan usage (also known as JTAG) has expanded and evolved into something more like a communications protocol running within an electronic system. In this way, it is similar to the Internet -- which allows you to access all kinds of information. Boundary scan allows you to access all kinds of design and test structures.

Those structures help you:

  • Debug and test boards
  • Program devices
  • Diagnosis hardware problems

SOLUTIONS

ASSET JTAG boundary-scan tools help solve interconnect test problems, and enable CPLD/FPGA Programming and Flash Programming. Boundary scan delivers this functionality because it can be used to access the "internals" of a:

  • Device -- to run Built-In Self-Test (BIST)
  • Board -- to verify proper assembly
  • System -- to help configure a system
So JTAG gives you the ability to test a:
  • Device and access internal scan
  • Board and program devices
  • System and verify assembly of boards to daughter cards, multichip modules (MCMs) and to other boards on the backplane

If you would like to get started implementing boundary scan using PC-based tools, our customers find success combining the following four elements:

To speak with an ASSET representative, click here.

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