Joining Synopsys in-Sync program accelerates embedded instrumentation

ASSET has joined Synopsys’ in-Sync™ program for third-party suppliers of EDA-related products. Synopsys is a world leader in software and IP for semiconductor design and manufacturing.  This step marks a significant advance towards ASSET’s commitment to deliver technology for embedded instrumentation tools.

“As the need for embedded instrumentation becomes more acute in the industry, it is incumbent upon us to support and interoperate with those tools that chip designers are using to insert this instrumentation,” said Alan Sguigna, vice president of sales and marketing for ASSET. “Then chip and circuit board designers, manufacturing engineers and even field service personnel will be able to use ScanWorks to access, automate and analyze embedded instrumentation throughout a system’s entire lifecycle.”

Synopsys will supply ASSET engineers with products to synthesize and verify chip-level DFT-related structures.  ASSET will verify interoperability between the ScanWorks embedded instrumentation platform and Synopsys’ TetraMAX® Automatic Test Pattern Generator (ATPG), TetraMAX DSMTest, DFT MAX compression, BSD Compiler boundary scan, and VCS® MX mixed Verilog and VHDL simulator.

“ASSET’s access to the Synopsys Galaxy™ test solution will help ensure robust flows for mutual customers of our boundary scan capabilities and ASSET’s board-level testing and debugging solution,” said Gal Hasson, senior director of marketing at Synopsys. “As process geometries shrink and designs become more complex, customers will benefit from greater automation between our DFT MAX compression and ASSET’s ScanWorks® for the entire boundary-scan based testing flow.”

TRADEMARKS:

ASSET and ScanWorks are registered trademarks of ASSET InterTech, Inc. Synopsys, Galaxy, in-Sync, TetraMAX and VCS are registered trademarks or trademarks of Synopsys, Inc.  All other trade and service marks are the properties of their respective owners.