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INSIDE ASSET

New JTAG switching chip for system-level boundary scan

Maxim LogoA new JTAG scan path management device, the first in some time, has been introduced by Maxim Integrated Products, Inc. of Sunnyvale, Calif.  The powerful DS26900 switch/multiplexer features three master ports and as many as 20 secondary ports. By cascading two DS26900s, as many as 40 secondary ports can be configured in a flexible star (radial) architecture.

“When JTAG was included as a defined option in PICMG®’s MicroTCA™, it demonstrated that system designers have considerable interest in system-level boundary scan,” said Adam Ley, ASSET’s chief technologist. “And now we’re seeing that again, as a PICMG working group is looking at defining such an option for AdvancedTCA®. (Click here for a story in this issue of Connect on the possible inclusion of JTAG in the ATCA® standard.) Judging by the capabilities of this chip, system designers are looking for ways to configure fairly sophisticated JTAG architectures at the system level.”

The DS26900 is quite flexible. Any one of three primary ports may function as the master JTAG port; as well, the two primary ports provided for in-system use also can be configured as secondary (slave) ports. Since the device has 18 slave-only secondary ports, the two primary ports bring the total number of available secondary ports to 20 per chip. Cascading two DS26900s together can double the number of secondary ports. Two DS26900s can also be deployed for redundancy.

The DS26900 contains two TAP (test access port) controllers. One functions as part of the primary switching mechanism and the other TAP controller manages the conventional IEEE Std 1149.1 interface for boundary-scan test purposes, such as circuit board structural tests. This boundary-scan circuitry is independent of and has priority over the operation of the master/slave JTAG multiplexer.

DS26900 Block Diagram

Figure 1    DS26900
Click to Enlarge

The DS26900 JTAG switch is designed to work at clock rates up to 50MHz. The arbitrated master JTAG port is the source of the operating clock. However, the board test functionality operates at 10 MHz.

For more information on this device, click here


Trademarks: PICMG®, the PICMG logo, AdvancedTCA®, AdvancedMC™, ATCA®, and MicroTCA™ are registered trademarks or trademarks of the PCI Industrial Computer Manufacturers Group.