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ScanWorks for the Agilent 3070 completes successful assessment at Jabil Circuit

Using boundary scan to link design and manufacturing test

 

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INSIDE ASSET

ScanWorks 3.3 reduces memory test development times

In the newly released ScanWorks 3.3, memory read/write protocols are described in sophisticated models that are provided by ScanWorks. Instead of test engineers taking on the tedious task of manually entering this information, ScanWorks' model library does it automatically.

ScanWorks 3.3 Memory Access Verification (MAV) action examines a board's netlist and, after accessing its model library, automatically determines how the memory chips on the printed circuit board (PCB) are connected to adjacent boundary-scan devices. With this information, MAV is able to automate the process of verifying the boundary-scan access to the memory chips on the PCB, streamlining the set-up and verification process for memory interconnect testing. In addition, MAV can provide diagnostics on memory devices down to the level of an address, a data signal or, in some cases, the control signal net.

Scripting automates test development flow

The new scripting capability in ScanWorks 3.3 is based on familiar test control languages like Tcl and Perl. With it, test engineers can automate many of the steps in the test development process and optimize test execution.

Scripting allows engineers or test technicians to define certain tasks for ScanWorks to perform automatically, relieving engineers from the burden of data gathering, data preparation, data logging for further analysis, data updates and other actions. In addition, the ScanWorks scripting capability can interface with other applications in the organization so that test results can be seamlessly communicated across the company or into another application. Follow-up steps that depend upon test results also can be defined and linked together with the ScanWorks scripting language.

For more information on ScanWorks' Process Automation Scripting, click here.

Differential signal test

The interconnect test capabilities of ScanWorks 3.3 have been expanded to include full testing and diagnostics on DC-coupled differential signal pairs. Differential signals are high-speed, two-line interconnects between chips on a printed circuit board. In some cases, typical boundary-scan interconnect tests could miss certain defects on a differential connection. Now, ScanWorks' interconnect test tool is able to reliably detect "stuck-at" faults and open circuits on both differential signals and isolate the fault to the signal pair. Differential signal test is another step in ASSET's strategy to continually improve ScanWorks, leading eventually to the ability to test AC-coupled interconnects.

Web-based Model Library

ScanWorks 3.3 provides customers with current maintenance contracts access to an extensive library of models needed for boundary-scan test generation, including BSDL files, Flash memory models, memory models, and non-boundary-scan models. ScanWorks users can search for and select the model of interest, review it’s contents, and download it to their local library if they need it. Models are provide with various levels of validation, which is clearly indicated in the description of the model. Model library users can add notes to describe special characteristics of the devices modeled or they can add new models to the library. The web-based library is currently stocked with thousands of BSDL files and non-boundary-scan models, and hundreds of memory and flash models.

Availability

ScanWorks 3.3 is available now. For more information, click here.