Tellabs
 ScanWorks® reduces Tellabs JTAG and ICT costs while improving board quality. Vivace Networks, which was recently acquired by Tellabs, Inc., of Naperville, IL, makes very complex circuit boards with more than 9,000 nodes, ball grid array (BGA) and micro-BGA devices with more than 400 pins, 32 layers per board and numerous application-specific integrated circuits (ASICs) with as many as 1,247 pins. Besides the fact the new division of Tellabs could only get 40 percent test coverage on such a board, producing in-circuit test (ICT) fixtures to thoroughly test boards like this was proving to be a very expensive and time consuming proposition. Read more... |
"Our boards have no in-circuit testing (ICT) capability due to extremely high chip density," said John Howard, manufacturing manager for the BATG Division of ADC Telecom Inc., in Cleveland, OH. "There was no room for test points and physical access to the fine pitch pins is very limited. It was taking us up to a month to test, troubleshoot and bring up a batch of 50 boards.With the testability services we've received from ASSET InterTech's Ensure DFT Division, as well as our contractors use of the ASSET boundary scan test and in-system programming system, we can now bring up a batch of boards in hours versus days." 
French
telecomm firm shares a ScanWorks license between two
facilities 800 km apart. The French telecommunications
equipment manufacturer AETA.COM was faced with a dilemma.
First, the JTAG test system it was using could not
find a problem the firm was having with one of its
designs. And second, the two facilities that needed
access to boundary scan test capabilities were 800
km apart. On both counts, ASSET's ScanWorks had an
effective solution. 
Ever on the lookout for ways to reduce costs and improve operating efficiencies, Lucent Technologies initiated a study to evaluate an implementation of ScanWorks® software on the Agilent 3070 Series 3 in-circuit test (ICT) platform. Lucent anticipated that the ScanWorks/3070 combination could lower overall test costs and reduce printed circuit board (PCB) test complexity by allowing Lucent test teams to reuse boundary-scan tests at in-circuit test. 
JTAG Training and Memory Interconnect Test pay off quickly for manufacturer of high-speed wireless equipment. If Michael Hinz, digital hardware design engineer at Navini Networks, were setting up a test strategy, the first piece of equipment he would acquire would be ASSET's ScanWorks boundary-scan test and in-system programming solution. 
ASSET
Helps Telecommunications Company Program Implement
In-System Programming with the ScanWorks JTAG Environment.
"Based on these results, we decided to require boundary
scan on all new products." 
See how ASSET helped Raytheon and ODS reuse their tests as they moved from development to manufacturing. "With ASSET, we were able to develop one of our JTAG tests in two weeks. We were amazed how quickly boundary scan test development went," said Greg Knight of Raytheon. Ron Romero of Essential/ODS attests, "We were able to start testing the system via JTAG right away because we didn't have to generate tests from scratch. We just re-used Raytheon's boundary scan tests."