Validation

Validating high-speed signal integrity:

Get past the obstacles.
Look at real signaling data where it matters.

Placing a probe on any of the next-generation 5, 6 or 8 gigabits-per-second (Gbps) serial I/O buses or device links is probably not returning the signal integrity results you want. Too often probing a bus like Intel®’s QuickPath Interconnect (Intel QPI), PCI Express™ (PCIe), Direct Memory Interface (DMI) or Double Data Rate memory, third generation, (DDR3) is extremely difficult. After a bunch of math and simulation, the best you get is an approximation of what the receiver sees. Besides, probing one or a few lanes at a time takes too long. And it’s not robust enough because you can’t detect dependencies like crosstalk. You can’t see what’s going on where it really counts, at the receiver. By the way, that test set you have is way too expensive.

The software-driven, cost-effective ScanWorks platform for embedded instruments gets the job done from the inside out. By taking advantage of the instruments that are embedded in the chips on your design, ScanWorks validates all lanes at once, slashing validation times and exposing dependencies among lanes and buses.

Let ScanWorks take validation off your design’s critical path.

Read More:

ScanWorks has a toolkit for Inte® IBIST (Interconnect Built-In Self Test), their embedded instrumentation technology. Click here.

Check out the board test technologies on the ScanWorks platform for embedded instruments:

Boundary-Scan Test
Processor-Controlled Test

View Videos:

An Intel® reference design needed test coverage. ScanWorks delivered.
Ten-minute hands-on video.