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Validating and testing I/O and memory buses with embedded instruments

 
Embedded instrumentation has become a much more effective method for validating and testing high-speed I/O and memory buses than the traditional intrusive, probe-based testers like oscilloscopes and logic analyzers. Placing a probe or a test pad for a probe on a high-speed serial or parallel bus only corrupts the signaling that the tester is trying to validate. Scope suppliers attempt to compensate for this phenomenon by simulating or extrapolating what the signal should look like, but this only drives up the cost of probe-based testers tremendously.
 
Many different types of instruments are being embedded into chips to give an empirical view of the signaling as it arrives at receivers. Engineers can truly see what the silicon sees. The data provided by this embedded I/O instrumentation can be used to perform a number of validation or test routines, such as bit error rate testing (BERT), margin analysis and others.
 
Some examples of I/O instruments, several high-speed buses that can only be validated and tested with non-intrusive embedded instrumentation, and various testing techniques are described below.
 
Intel® IBIST Embedded Instrumentation
Intel® QPI Bus
PCI Express® Bus
DDR3 Memory Bus
Embedded BERT
Margin Analysis
 
 

Intel® IBIST

Intel IBIST (Interconnect Built-In Self Test) is an embedded instrumentation technology in Intel’s chips and chipsets. At the board level, IBIST is employed to validate signal integrity and in non-intrusive board test (NBT) applications in high-volume manufacturing testing.
 
Learn more about the Intel IBIST toolkit for the ScanWorks platform
Fact Sheet: “ScanWorks Intel IBIST QPI Validation Toolkit”

 

Intel QPI (QuickPath Interconnect)

To optimize parallel processing in multi-processor systems Intel developed QPI as a point-to-point high-speed link to shared memory. To deploy the Intel QPI architecture, each processor features an integrated memory controller and high-speed interconnects to other processors and components.

 

PCI Express®

The high-speed serial PCI Express (PCIe) bus replaced the parallel PCI I/O bus. PCIe is a two-way, serial connection that carries data in packets along pairs of point-to-point lanes. Since its introduction, PCIe has been updated several times. The most recent version, PCIe Generation 3, has a speed of eight gigatransfers per second (GT/s) per lane.

 

PLX® visionPAK

visionPAK is a bundle of embedded instruments developed by PLX Technologies and inserted in its chips. It consists of a packet generator and system analyzer toolset for PCIe switching devices. It is supported by the ScanWorks platform.
 
News release on ScanWorks support for visionPAK.

 

DDR3 Memory Bus (Double Data Rate Memory Generation 3)

The DDR3 interface connects a processor to external SDRAM memory. DDR3’s high transfer rates are made possible by its eight-burst-deep pre-fetch buffer. The DDR3 memory bus supports speeds up to 2.133 GT/s.

 

Embedded BERT

Unlike external bit error rate tests (BERT) which depend on placing an intrusive probe as close to a receiver as possible and specialized fixtures, non-intrusive embedded BERT takes advantage of embedded instrumentation to empirically monitor the error rate at the receiver.

 

Margin Analysis

Margin analysis measures the difference or margin between a bus’ operating state on certain parameters and the outer acceptable limit. Margin analysis often involves stressing one or more high-speed interconnects to identify possible failure scenarios. This analysis is more comprehensive when stress can be placed simultaneously on as many lanes on a bus as possible, because the operation of one lane often affects neighboring lanes through crosstalk and noise.

Other ScanWorks Technologies…

For information on any of the other technologies supported by the ScanWorks platform for embedded instruments, click on one of the following: 
The Evolution of Test
JTAG (IEEE 1149.x)
On-Chip Debug
SerDes BIST
Intel® IBIST
IJTAG (IEEE P1687 Internal JTAG) and other embedded instrumentation standards
 

CPU & FPGA Support

ScanWorks supports Intel®, ARM®, Freescale™,
& other CPUs; Altera® and Xilinx® FPGAs.

See the full range