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Testing DDR3 Memory with
Boundary Scan/JTAG | eBook

Functional Test on I2C and SPI System Monitors with JTAGA recent survey of test engineers asked what their biggest circuit board test problems were. One of the top three answers was characterizing and testing soldered-down memories!

Clearly, the ability to thoroughly test, characterize and diagnose faults and failures with soldered-down memory is one of the most pressing problems in the industry. Using DDR3 memory as an example, this e-Book discusses how boundary scan test and JTAG methods based on the IEEE 1149.1 standard can be an effective solution.

Key Points:
  • Testing memories every step of the way
  • What is boundary scan memory test?
  • Test and characterize DDR3



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