New white paper reveals shrinking eye diagrams and signal integrity problems on high-speed buses
November 27, 2012
A new white paper from ASSET® InterTech points out how increasing bus speeds on circuit boards could create havoc for signal integrity on those buses, in turn degrading the bus’ throughput performance. Each new generation of a high-speed bus typically runs at a higher signal frequency, but this decreases the margin for error on the bus, making it more sensitive to disruptions from jitter, inter-symbol interference (ISI), crosstalk and other factors.
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