logo

IntelĀ® IBIST

Intel® IBIST Embedded Instrumentation Technology

 
Intel Interconnect Built-In Self Test (IBIST) is a proprietary specification created as a standard on-chip infrastructure for validating, testing and debugging the high-speed I/O (HSIO) buses that interconnect chips on circuit boards. Intel and its customers have deployed IBIST extensively. ASSET’s ScanWorks platform for embedded instruments is the only toolkit supporting Intel IBIST. In fact, Intel does not provide IBIST tools; it relies upon ASSET as a strategic supplier of IBIST tools.Eye Diagram
 
Intel IBIST can be applied to many of the buses that are typically implemented today on Intel-based platform designs, including Intel® QuickPath Interconnect (QPI), Direct Media Interface (DMI), PCI Express® (PCIe), Scalable Memory Interface (SMI), and the Double Data Rate 3rd generation (DDR3) memory bus.
 
Intel IBIST functions by generating synthetic patterns and performing error checking at the receiving end of the connection between two devices. Because it inspects received bits, IBIST can empirically determine the bit error rate (BER) that is actually occurring at the physical (PHY) layer. In addition, timing and voltage offsets can be adjusted to determine the amount of operating margin that is available on a particular bus. An IBIST tool can then plot this margin data as a virtual eye diagram to visually portray the signal integrity on the bus. All IBIST validation and test routines are performed independently of a platform’s operating software. The IEEE 1149.1 JTAG/boundary scan standard and its Test Access Port (TAP) are employed for physical access to the embedded on-chip IBIST functionality.
 
In a paper presented at the 2009 International Test Conference, Intel engineers indicated that the Intel IBIST standard was developed because “conventional testing methods will not be sufficient” as a result of certain technological trends in the industry.1 Further, the Intel paper stated: “The need for better design validation and factory test methods has driven the development of the IBIST methodology.”
 

Technical Papers:

 1 “Intel® IBIST, the Full Vision Realized” by Jay Nejedlo and Rahul Khanna, Intel Corporation, as presented at the IEEE International Test Conference, 2009. Click here to access the ITC web site where this paper can be purchased.

Books:

"Mastering High Performance Multiprocessor Signaling: Electrical design with the Intel QuickPath Interconnect" (http://www.amazon.com/gp/product/images/1934053163/ref=dp_image_0?ie=UTF8&n=283155&s=books)

Other ScanWorks Technologies…

For information on any of the other technologies supported by the ScanWorks platform for embedded instruments, click on one of the following: 
The Evolution of Test
JTAG (IEEE 1149.x)
On-Chip Debug
SerDes BIST
Intel® IBIST
IJTAG (IEEE P1687 Internal JTAG) and other embedded instrumentation standards
 

CPU & FPGA Support

ScanWorks supports Intel®, ARM®, Freescale™,
& other CPUs; Altera® and Xilinx® FPGAs.

See the full range