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Events

ASSET InterTech, Inc. invites you to visit us at any one of the below exhibits to learn about ScanWorks® for Embedded Instrumentation for boundary-scan test (BST), processor-controlled test (PCT), high-speed I/O (HSIO) validation / Intel® Interconnect BIST (IBIST), Software Debug and Trace, IJTAG test, and FPGA-controlled test (FCT).

ASSET technologists and product managers present at many trade shows.  Here are some of the recent and upcoming presentations, panels and events:

2014 Tradeshows and Workshops

Intel® Developers Forum (IDF)
International Test Conference (ITC)
ARM® TechCon™
 
The Design, Automation and Test in Europe (DATA)

Latin American Test Workshop (LATW)

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2013 Tradeshows and Workshops

Intel® Developers Forum (IDF)
  • IDF 2013 - San Francisco, CA, Sept, 10-12, 2013, Booth #557

International Test Conference (ITC)
  • ITC 2013 – Anaheim, CA, Sept. 10 - 12, 2013, Booth #110
    • "Don’t Forget to Lock your SIB: Hiding Instruments using P1687" - Al Crouch (ASSET), John Potter, Jennifer Dworak(SMU), Adam Zygmontowicz, and Micah Thorton
    • "The Future of Test Automation—Where Should We Place Our Bets?" - Panelist: G. Woppman, ASSET InterTech
    • "Fourth IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits 3D-TEST" Arrangements Chair: John Potter
 
IEEE International Workshop on Defect and Adaptive Test Analysis (DATA)
  • DATA 2013 - Anaheim, CA, September 12, 2013
Organizers: Jeff Roehr Program Chair (TI), Al Crouch Test Standards Chair (ASSET), Jennifer Dworak Vice-Program Chair (SMU)
  • Workshop: "Digital & Analog Test and Data Analysis"

Nordic Test Forum (NTF)
  • Nordic Test Forum - Tallinn, Estonia, November 26-27, 2013
  • "Differences between IEEE 1149.1-2013 and IEEE P1687" -Speaker: Jennifer Dworak(SMU), Al Crouch (Asset).

TestVision2020

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ARM® TechCon™
  • ARM TechCon 2013, Santa Clara, CA, October 29 - 31, 2013, Booth #603
EE Journal's Amelia Dalton weekly Fish Fry interview with Glenn Woppman at ARM TechCon.


Silicon Valley Test (SVT)
  • Silicon Valley Test (SVT) 2013, Santa Clara, CA, October 29, 2013
    • 4th Silicon Valley Test Workshop "TBD" - Al Crouch (ASSET)  
    • 1st Silicon Valley PXI Workshop Chair:Nick Langston "Testing for Counterfeits, Trojans, and IP Theft", Al Crouch (ASSET)  

IEEE VLSI Test Symposium (VTS)
  • VTS 2013 - Berkeley, CA, April 29 - May 1, 2013
    • Received "Best Session in 2012" award, accepted By Jennifer. - Al Crouch (ASSET), Jennifer Dworak(SMU)

Southwest Design for Test (SWDFT)
  • SWDFT 2013 - Austin, TX, June 6-7, 2013
    • "Embedded Instrument Security" - Jennifer Dworak, Presenter, By Al Crouch (ASSET),  John Potter (ASSET), and Jennifer Dworak (SMU) Presentation Paper

Design Automation Conference (DAC)
  • 50th Anniversary Design Automation Conference, Austin, Texas, June 2-7, 2013
    • Test/Diagnose/Debug: Let the 3D-IC Chaos Begin
      June 5, 1:30pm to 2:30pm, Panelist: Al Crouch (ASSET),Krishendu Chakrabarty (Duke); Mike Shapiro (IBM); Shahin Toutounchi (Xilinx) Panel Position Presentation
    • "DFT and Test", Al presented the "History of DFT and Test according to Al", - Author / Presenter: Al Crouch (ASSET)
    • "Adventures in Time and Space: Targeting Resiliency", Embark on a trip to the land of reliability and explore how current and future techniques will save us all from decaying and unpredictable chips. - Chair: Al Crouch (ASSET)

2012 and Earlier Tradeshow and Workshops

Intel® Developers Forum (IDF)
  • IDF 2013 - San Francisco, CA, Sept, 10-12, 2013, Booth #557
  • IDF 2012 - San Francisco, CA, Sept. 11-13, 2012, Booth #722

International Test Conference (ITC)
  • ITC 2013 – Anaheim, CA, Sept. 10 - 12, 2013, Booth #110
  • ITC 2012 – Anaheim, CA, Nov. 4-9, 2012, Booth 117
    • "Board Assisted-BIST: Long and Short Term Solutions for Testpoint Erosion - Reaching into the DFx toolbox" by Zoe Conroy, Jmes Grealish, Harrison Miles, Anthony Suto, Al Crouch (ASSET) and Skip Meyers
    • "Are the chip guys helping or hindering board test?" panel session with Al Crouch (ASSET), Harrison Miles, James Grealish, Skip Meyers, Tony Suto, Phil Geiger and David Godlewski
    •      Unable to attend. Find out the big buzz at this year's ITC.
 
IEEE International Workshop on Defect and Adaptive Test Analysis (DATA)
Organizers: Jeff Roehr Program Chair (TI), Al Crouch Test Standards Chair (ASSET), Jennifer Dworak Vice-Program Chair (SMU)
  • DATA 2012 - Anaheim, CA, Nov. 9, 2012

Nordic Test Forum (NTF)
  • "Differences between IEEE 1149.1-2013 and IEEE P1687" -Speaker: Jennifer Dworak(SMU), Al Crouch (Asset).

TestVision2020
IEEE North Atlantic Test Workshop (NATW)
Asian Test Symposium (ATS)
  • ATS 2012 - Niigata, Japan, November 19-22, 2012


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ARM® TechCon™
  • ARM TechCon 2013, Santa Clara, CA, October 29 - 31, 2013, Booth #603
EE Journal's Amelia Dalton weekly Fish Fry interview with Glenn Woppman at ARM TechCon.

Freescale Technology Forum (FTF)
Silicon Valley Test (SVT)
IEEE VLSI Test Symposium (VTS)
 
Southwest Design for Test (SWDFT)
  • SWDFT 2013 - Austin, TX, June 6-7, 2013
    • "Embedded Instrument Security" - Jennifer Dworak, Presenter, By Al Crouch (ASSET),  John Potter (ASSET), and Jennifer Dworak (SMU) Presentation Paper
  • SWDFT 2012 - Austin, TX, May 2-3, 2012
    • Al Crouch, ASSET - Steering/Organizing Committee

Board Test Workshop
Design Automation Conference (DAC)
  • 50th Anniversary Design Automation Conference, Austin, Texas, June 2-7, 2013
    • Test/Diagnose/Debug: Let the 3D-IC Chaos Begin
      June 5, 1:30pm to 2:30pm, Panelist: Al Crouch (ASSET),Krishendu Chakrabarty (Duke); Mike Shapiro (IBM); Shahin Toutounchi (Xilinx) Panel Position Presentation
    • "DFT and Test", Al presented the "History of DFT and Test according to Al", - Author / Presenter: Al Crouch (ASSET)
    • "Adventures in Time and Space: Targeting Resiliency", Embark on a trip to the land of reliability and explore how current and future techniques will save us all from decaying and unpredictable chips. - Chair: Al Crouch (ASSET)
 

CPU & FPGA Support

ScanWorks supports Intel®, ARM®, Freescale™,
& other CPUs; Altera® and Xilinx® FPGAs.

See the full range